More cores equal more power
In a world where electronics are becoming more powerful and autonomous, low-power, high-performance processors will be the future of processing. The Massively Parallel Processor Array (MPPA®) is Kalray’s ground-breaking manycore technology, giving chips more processing power with less power consumption.
From a world-renowned research institution to a start-up
Research for the MPPA®’s structure began at the CEA, France’s high-tech energy research institution, based partly in Grenoble, France (2016’s most innovative research institution, according to Reuters). In 2008, Kalray spun off from the CEA and became its own entity. Since then, Kalray has continued developing its signature MPPA® manycore processors – from the core up – providing innovative processing solutions for a variety of sectors.
KALRAY COMPUTE CORE
A unique solution, from core up
The distinctiveness of the MPPA® starts at the core level. The cores of a processor provide the foundation for the chip’s processing. They are the gateways that will determine the performance and functionality of the chip. A “manycore” processor is exactly that: a whole bunch of cores all linked together on the same chip. Kalray’s manycore processor may have up to 288 cores.
Still, developing a functional manycore processor is not as simple as just multiplying the cores on the die. The manycore design adds a new level of complexity to a processing architecture as a whole. To ensure complete control over the architecture, Kalray chose to develop its own core – engineered to be the smallest parts of powerful processors. The Kalray core is a 5-issue VLIW core with 64-bit architecture.
Starting with the chip’s very tiniest elements, Kalray built its processor with manycore in mind.
Adding order to a complex system
The MPPA®2-256 is made up of 288 cores: 256 compute cores, 16 management cores and 4 quad cores.
The cores are split up into 16 computer clusters (each with 16 cores & 1 management core) and 4 quad cores (each with 4 cores). The compute cores and management cores have the same features: 5 execution units, 2 ALUs, 1 BCU, 1 MAU, 1 LSU…
A wealth of on-chip memory
The MPPA®2-256 has 2MB of Shared Memory (SMEM) split up into 16 banks of 128KB each (with a 64-bit width).
An added layer of safety
The MPPA®2-256 contains 128 crypto co-processors. This means that each set of two cores benefits from having 1 co-processor.
Co-processors add a further layer of security for applications that need unbreakable cryptography or for applications with no other layers of cryptography.
Each crypto co-processor includes 2 compute units:
- UNIT0: DES, AES-128, AES-192 or AES25 encryption and decryption
- UNIT1: DES encryption or decryption, 128×128 carry-less multiplication (CLMUL), 64×64 CLMUL, Galois field operations, SHA-1, SHA-256, SHA-512, CRC32 or CRC64 with any polynomials
In addition, they contain two True Random Number Generators (TRNG)
- For OpenSSL key generation
- Compliant: FIPS 14°-2, FIPS 140-3 draft, SP 800-90B draft
The crypto co-processors are an asynchronous operation, compute cores can process other data in parallel.